MTCMOS (multiple threshold CMOS) or power-gating employs a power-mitigation technique for a system-on-chip (SoC) that uses one or more sleep transistors to shut off supply power to certain blocks within the SoC whenever such blocks are desired to be in “standby” or “sleep” mode. Typically transistor switches, such as one or more “header” switches for a VDD supply or one or more “footer” switches for a VSS or ground supply are employed to reduce power dissipation in the circuit. Size and configuration of these header or footer cells and buffers that always remain turned on, is greatly dependent on IC size, required wake-up time and specified tolerable rush-in current characteristics. A variety of different strengths of header or footer cells along with a variety of delay buffers are typically required to support all possible IC applications, which would impose wide-ranging restrictions on wake-up time and rush-in current. Improvements with respect to minimizing the size of the often-customized libraries of cells required to support such wide-ranging restrictions would prove beneficial to the art.